Magnetic Random Access Memory (MRAM) devices based on spin-dependent tunnel junctions are being explored as non-volatile solid state memory devices for embedded and stand alone applications. MRAM devices utilize magnetic material within memory cells to store data bits. The data bits are read by magnetoresistive sensing. MRAM memory cells can be programmed by magnetizing the magnetic material within the cells. The magnetic field required to switch the state of a cell (e.g., from “0” to “1”) is typically quite low, e.g., in the range of 10-25 Oersteds (Oe).
In its basic concept, an MRAM memory cell typically consists of a patterned magnetic multi-layer bit region, and two conductive lines (e.g., the word and bit lines) that are used to read and write the magnetic state of the multi-layer bit region. In further refinements, additional magnetic layers have been included within MRAM memory cells in order to (1) provide magnetic shielding and (2) improve write efficiency.
1. Magnetic Shielding
In order to successfully incorporate MRAM into portable electronic devices such as portable phones, personal digital assistants (PDA's), pagers, and the like, it is necessary to shield the MRAM devices from stray magnetic fields that may present within and around such devices. Examples of such disturbances include the magnetic field generated by a loudspeaker in a telephone, which may be as large as approximately 800 Oe, and the current in the overhead lines of a train, which may produce magnetic fields as large as approximately 50 Oe.
Efforts have been made to shield MRAM devices from these types of stray magnetic fields. For example, U.S. Pat. No. 5,902,690 of Tracy et al. (“Tracy et al.”) describes the introduction of a passivation layer encapsulating the chip. Tracy et al. describes two embodiments of a passivation layer. The first embodiment uses a ceramic material that includes ferrite particles to encapsulate the MRAM cell. The second embodiment uses a ferrite film, which is deposited on top of the MRAM device. U.S. Pat. No. 6,211,090 of Durlam et al. (“Durlam et al.”) describes another method of shielding an MRAM device, namely by forming a metallic, high permeability shielding layer, such as NiFe, on top of the completed device.
2) Improving Write Efficiency by Use of a Magnetic Keeper
Inserting a soft magnetic keeper around the write conductors of an MRAM device has been found to provide a desirable modification or concentration of the flux path resulting in an increase of the write efficiency, which could result in a decreased power consumption of the device. U.S. Pat. No. 5,956,267 of Hurst et al. discloses such an arrangement.
An important aspect of magnetic shielding and keeper layers is their compatibility with standard integrated circuit (IC) metallization processing. A state of the art metallization scheme typically encompasses the use of multilevel copper metallization layers, separated by dielectric layers such as Plasma Enhanced Chemical Vapor Deposited (PECVD) SiO2 or other low k materials (e.g., in a dual damascene metallization scheme). For a magnetic layer to be integrated in such a process flow, the following criteria are desirable:                1. The permeability μ of the magnetic film should be sufficiently high (e.g., >100). The efficiency of shielding is proportional to the film thickness “t” multiplied by μ. Having an insufficient value of μ results in an unpractical requirement on the thickness of the magnetic shielding layer.        2. The thermal stability of the magnetic material must be such that the permeability is not reduced significantly by the thermal budget associated with the process. The thermal budget of a damascene process is typically governed by the dielectric deposition. One example of a typical temperature for such a process may be 450° C.        3. The preparation method of the magnetic film should preferably employ standard semiconductor deposition methods such as Physical Vapor Deposition (PVD) or Chemical Vapor Deposition (CVD).        4. The magnetic material should preferably not contain metals which, when diffusing in the silicon, would degrade transistor performance. If such materials are used, the use of a diffusion barrier is required.        5. In the case of the keeper layer, the permeability has to have a high value at frequencies close to and slightly above the write frequency of the memory (e.g., several hundreds of MHz to low GHz).        
While above-referenced prior art teachings provide shielding and keepers for use with MRAM devices, they suffer from some drawbacks resulting from the materials that are used, which make them difficult to incorporate into a multi-layer IC metallization process.
For example, while the inventions of Tracy et al. and Durlam et al. are effective to shield MRAM devices from stray magnetic fields, they suffer from some drawbacks resulting from the types of materials used for the shielding and passivation layers. For example, the foregoing references propose using either oxidic magnetic films (e.g., Mn—Zn-Ferrite or Ni—Zn-Ferrite) or crystalline metallic films (e.g., NiFe alloys) for shielding. Crystalline materials (e.g., Ni80Fe20, Ni45Fe55, FeTaN) generally display some degree of recrystallization during high temperature processes which leads to a degradation of magnetic properties. Therefore, these materials may be unsuited for multi-layer IC fabrications in which a device undergoes one or more high temperature processes after the deposition of a shielding or passivation layer.
In Hurst et al., NiFe, CoNiFe and CoFe are suggested as materials for keeper fabrication. One drawback associated with the materials used for the keeper of Hurst et al. is that they require the use of a diffusion barrier such as TiW, TaN, or the like. The inclusion of this additional diffusion layer undesirably complicates and increases the cost of the fabrication process. Furthermore, it has been found that the permeability of such materials drops typically in the frequency range of tens to hundreds of MHz, due to eddy current losses and ferromagnetic resonance. This adversely affects the operation and effectiveness of the keeper layers at frequencies relatively close to the write frequency of typical MRAM devices (e.g., several hundreds of MHz to low GHz).
There is therefore a need for a new and improved material for magnetic shielding and keeper applications in MRAM devices, which is adapted for integration with a multi-layer fabrication process.